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Important Dates for Volume & Issue     Paper Submission : 30-11-2017   Frequency : 12 Issues per Year

Current Issues


Sr No.

Title of Paper

I. PROPOSED GENERALIZED EQUALIZATION MODEL APPROACH FOR IMAGE ENHANCEMENT

Authors: S. Jeevana Jyothi, Mr. A . M. Guna Sekhar   

Page No.: 1 - 6  

II. BER ANALYSIS OF CONVENTIONAL AND WAVELET BASED OFDM IN LTE USING DIFFERENT MODULATION TECHNIQUES

Authors: S. Padmaja, Mr. S. Chakri Sreedhar   

Page No.: 7 - 14  

III. SECURE WAY OF ENDORSED DEDUPLICATION BASED ON HYBRID CLOUD APPROACH

Authors: R. Vinaykrishna, G. Lakshmikanth   

Page No.: 15 - 19  

IV. ERROR DETECTING AND CORRECTING CODE USING ORTHOGONAL LATIN SQUARE USING VERILOG HDL

Authors: P. Vinod Kumar, S. Chakri Sreedhar   

Page No.: 20 - 25  

V. TEST THE BENCHMARK CIRCUIT BY USING BUILT-IN SELF TEST AND TEST PATTERN GENERATION IN FPGA TECHNOLOGY

Authors: B. Hariprasad, A. Chandra Babu   

Page No.: 26 - 31  

VI. A NOVEL WEIGHTED SUBSPACE FITTING CFO ESTIMATION IN THE OFDM SYSTEMS

Authors: K. Ligi, Mr. P. Giribabu   

Page No.: 32 - 38  

VII. IMPLEMENTATION OF N-BIT COMPARATOR USING HYBRID PTL/CMOS LOGIC

Authors: E. Devisri, K. Yogitha Bali   

Page No.: 39 - 45  

VIII. IMPLEMENTATION OF LOW POWER PULSE- TRIGGERED FLIP-FLOP DESIGN BASED ON TSPC LATCH

Authors: K. Doraraja, S. Chakri Sreedha   

Page No.: 46 - 51  

IX. AN OPTIMIZED IMPLEMENTATION OF FM0/MANCHESTER ENCODING USING SOLS TECHNIQUE IN FPGA TECHNOLOGY

Authors: T. Sindhu, E. Venkat Reddy   

Page No.: 52 - 58  

X. AN OPTIMIZED IMPLEMENTATION OF LMS ADAPTIVE FILTER WITH LOW ADAPTATION DELAY IN FPGA TECHNOLOGY

Authors: B. Lakshmi, C. Karthik   

Page No.: 59 - 65  

XI. A NOVEL RNS MONTGOMERY EXPONENTIATION ALGORITHM FOR CRYPTOGRAPHY

Authors: D. Supraja, N. Vasu   

Page No.: 66 - 71  

XII. NEW VLSI BWA ARCHITECTURE FOR FINDING THE FIRST W MAXIMUM/MINIMUM VALUES USING SORTING ALGORITHMS

Authors: K. Muni Srinivas, C. Karthik   

Page No.: 72 - 79  

XIII. AN EFFICIENT IMPLEMENTATION OF ENCODING SCHEME FOR POWER REDUCTION IN NETWORK ON CHIP LINKS USING FPGA  TECHNOLOGY

Authors: M. Buvaneshwari, A. Bala Chandra Reddy   

Page No.: 80 - 87  

XIV. A SECURE WAY FOR PRIVACY PRESERVED PROFILE MATCHING IN MOBILE SOCIAL NETWORKS

Authors: S. Soumya, R. China Appala Naidu   

Page No.: 88 - 95  

XV. VLSI IMPLEMENTATION OF ENCODING TECHNIQUE FOR EFFICIENT HARDWARE UTILIZATION IN DSRC APPLICATIONS

Authors: Ambika M, Mrs. T. Nagalaxmi   

Page No.: 96 - 103  

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