IMPACT FACTOR : 3.250
Important Dates for Volume & Issue     Paper Submission : 30-11-2017   Frequency : 12 Issues per Year

Current Issues


Sr No.

Title of Paper

I. A LOW POWER MULTIBAND CLOCK DISTRIBUTATION USING TRUE SINGLE PHASE CLOCK

Authors: Theerthendra Vadakattu, Rajkumar Bhure   

Page No.: 1 - 6  

II. A FOREST FIRE MONITORING SYSTEM BASED ON GPS AND ZIGBEE WIRELESS SENSOR NETWORK

Authors: Syeda Amtul Mateen, Yasmeen Begum   

Page No.: 7 - 12  

III. DESIGN GPRS BASED SMART SENSOR NETWORK FOR MONITORING THE CHANGES IN INDUSTRIES

Authors: B. Vanesh, G. Sai Thirumal   

Page No.: 13 - 19  

IV. A DG-BASED RESIDENTIAL ELECTRIC POWER SUPPLY SYSTEM AS A SMART GATEWAY GRID

Authors: Vasapari Ravi Chandar, Kothuri Rama Krishna, Dr. N. Bhoopal   

Page No.: 20 - 28  

V. POWER EFFICIENT IMPLEMENTATION OF DOUBLE TAIL COMPARATOR

Authors: Annae Avinesh Kumar, K. Srinivas   

Page No.: 29 - 36  

VI. ENGINE SELF AUTOMATED SYSTEM FOR AIR POLLUTION DETECTION IN VEHICLES

Authors: Revelli Niranjan, P. Krishna Rao   

Page No.: 37 - 40  

VII. COUNTING, CLASSIFICATION, AND SPEED MEASUREMENT FOR VEHICLE IN A ROADSIDE SENSORS

Authors: Gollapalli Naresh, Nalla Suresh   

Page No.: 41 - 47  

VIII. LOAD FREQUENCY CONTROL OF HYBRID SYSTEM USING FUZZY CONTROLLER AND IMPLEMENTING NEURO FUZZY CONTROLLER

Authors: P. Gangadhara Reddy, S. Chandra Kiran   

Page No.: 48 - 58  

IX. DEVELOPMENT OF ARM7 BASED SENSOR INTERFACE FOR INDUSTRIAL WIRELESS SENSOR NETWORK (WSN) IN IOT  ENVIRONMENT

Authors: T. Balakrishna, R. Naga Swetha   

Page No.: 59 - 67  

X. AN OPTIMIZED IMPLEMENTATION OF 64-BIT CARRY SELECT ADDER IN FPGA TECHNOLOGY

Authors: V. Bharathi, D. Y. Pushpa Mitra   

Page No.: 68 - 73  

XI. VLSI IMPLEMENTATION OF INTEGER DCT ARCHITECTURES FOR HEVC IN FPGA TECHNOLOGY

Authors: A. Sumana, S. Siddeswara Reddy   

Page No.: 74 - 87  

XII. CMOS REALIZATION OF LOW POWER MIXING DRIVERS IN CLOCK-TREE

Authors: M. Srilatha, K. Dastagiri   

Page No.: 88 - 93  

XIII. FOR REFINERY & AUTONOMOUS BASED ROBOT USING WIFI

Authors: S. Sindhu, A. M. Guna Sekhar   

Page No.: 94 - 99  

XIV. RECONFIGURABLE ARCHITECTURE FOR EFFICIENT AND SCALABLE ORTHOGONAL APPROXIMATION OF DCT IN FPGA TECHNOLOGY

Authors: Sanchi Swathi, P. Sarvani   

Page No.: 100 - 104  

XV. DESIGN AND ANALYSIS OF 128 POINT FFT USING RADIX 8 ALGORITHM USING FPGA TECHNOLOGY

Authors: Duvvuru Uday kumar, P. Sreenivasulu   

Page No.: 105 - 110  

XVI. LOW POWER AUTOMATIC RESETTING OF TRANSDUCER CAPACITANCE IN PIEZOELECTRIC ENERGY HARVESTING SYSTEMS

Authors: Konduru Somasekhar, Subramanyam Karan   

Page No.: 111 - 115  

XVII. VLSI IMPLEMENTATION OF HARDWARE-BASED WEIGHTED RANDOMPATTERN GENERATION

Authors: T. Saritha, A. Rajeshwarrao   

Page No.: 116 - 121  

XVIII. DT-CWT AND NLM BASED SATELLITE IMAGE RESOLUTION ENHANCEMENT ALGORITHM USING WAVELET-DOMAIN MECHANISM FOR  BETTER PERCEPTION

Authors: S. Allabaksh Shaik, Nandrala Ramanjulu   

Page No.: 122 - 130  

XIX. OPTIMIZATION DESIGN OF SCAN TEST BANDWIDTH MANAGEMENT FOR SOC USING FPGA

Authors: Kayam Ganga Devi, Prasad Valluru   

Page No.: 131 - 138  

XX. AN INNOVATIVE HYBRID RANDOM WALK METHOD FOR IMPROVING SOCIAL RECOMMENDATIONS

Authors: Ronanki Anusha, Mr. N. Naveen Kumar   

Page No.: 139 - 143  

XXI. REDUCING THE USER EFFORT IN LARGE SCALE DEDUPLICATION TASKS THROUGH T3S FRAMEWORK

Authors: V. Srihitha, Mr. N. Naveen Kumar   

Page No.: 144 - 149  

XXII. IMPROVING THE ACCURACY OF THE FORM BY CLASSIFYING DEEP-WEB FORMS

Authors: Yanamanagandla Mounika, Mr. N. Naveen Kumar   

Page No.: 150 - 154  

XXIII. SCAN TEST DATA TRANSMISSION RATE MANAGEMENT FOR HIGH-END SYSTEM-ON-CHIP DESIGNS

Authors: S. V. Rama Krishna, H. Devanna, T. Chakrapani, K. Sudhakar   

Page No.: 155 - 161  

XXIV. DESIGN AND IMPLEMENTATION OF HEALTH CARE MONITORING SYSTEM

Authors: Abhijeet Singh Rajpurohit   

Page No.: 162 - 166  

XXV. CHARACTERISTICS STRENGTH OF STEEL WASTE HYDRATED MATRIX

Authors: Maccha Ramcharan, Diptikar Behera   

Page No.: 167 - 171  

XXVI. TO IMPROVE THE PACKET DELIVERY RATIO DUE TO ESTABLISHING STABLE ROUTES

Authors: D. Manasa, Manasa   

Page No.: 172 - 177  

XXVII. THE PRIVACY-PRESERVING REQUIREMENT FOR THE AUDITING PROCESS IN WIRELESS AD HOC NETWORKS

Authors: Md Junaid Akbani, Manasa   

Page No.: 178 - 182  

XXVIII. HIGH SPEED MODIFIED BOOTH RECODER FOR FAM DESIGN USING S-MB TECHNIQUE

Authors: Akinapally Vedavidya, B. Swapna Rani, Dr. D. Nageshwarrao   

Page No.: 183 - 192  

XXIX. VLSI ARCHITECTURE FOR EXPLOITING CARRY-SAVE ARITHMETIC USING VERILOG HDL

Authors: G. Harsha, K. Sudha Rani, Dr. D. Nageshwarrao   

Page No.: 193 - 198  

XXX. VLSI DESIGN AND IMPLEMENTATION OF LPC AND OLSC

Authors: Kankanala Satish Kumar, G. Deepika   

Page No.: 199 - 208  

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